Verification Engineer (Fresh Graduate)
NXP Semiconductors
Eindhoven
3 dagen geleden

Main responsibilities

  • Top-level IC verification using UVM methodology
  • Develop and execute top-level test cases, self-checking test benches and regressions suites
  • Update the verification environment (update verification components, drivers, checkers, scripts and Tcl procedures to his / her test needs)
  • Documentation of the work done and verification progress reporting
  • Written and verbal communication
  • Job Qualifications :

  • B.Sc or M.Sc. in electronic engineering or equivalent
  • Good knowledge of System Verilog, Verilog and / or VHDL design languages
  • Experience with UVM
  • Experience in programming C, C++, Tcl
  • Able to identify and resolve complex issues, can work independently
  • Proactive and responsible work approach
  • Good communication skills (verbal and written), team player, driver mentality, pro-active attitude.
  • Networking skills, creative, motivating, curious, open minded.
  • Fluent English speaker.
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